1 idt54/74fct16245t/at/ct/et fast cmos 16-bit bidirectional transceiver military and industrial temperature ranges october 2003 idt54/74fct16245t/at/ct/et military and industrial temperature ranges fast cmos 16-bit bidirectional transceiver description: the fct16245t 16-bit transceiver is built using advanced dual metal cmos technology. these high-speed, low-power transceivers are ideal for synchronous communication between two busses (a and b). the direction and output enable controls operate these devices as either two independent 8-bit transceivers or one 16-bit transceiver. the direction control pin (xdir) controls the direction of data flow. the output enable pin (x oe ) overrides the direction control and disables both ports. all inputs are designed with hysteresis for improved noise margin. the fct16245t is ideally suited for driving high-capacitance loads and low- impedance backplanes. the output buffers are designed with power off disable capability to allow "live insertion" of boards when used as backplane drivers. 1 dir 1 oe 1 a 1 1 a 2 1 a 3 1 a 4 1 a 5 1 a 6 1 a 7 1 a 8 1 b 1 1 b 2 1 b 3 1 b 4 1 b 5 1 b 6 1 b 7 1 b 8 2 dir 2 oe 2 a 1 2 a 2 2 a 3 2 a 4 2 a 5 2 a 6 2 a 7 2 a 8 2 b 1 2 b 2 2 b 3 2 b 4 2 b 5 2 b 6 2 b 7 2 b 8 the idt logo is a registered trademark of integrated device technology, inc. ? 2003 integrated device technology, inc. dsc-5456/4 functional block diagram features: ? 0.5 micron cmos technology ? high-speed, low-power cmos replacement for abt functions ? typical t sk(o) (output skew) < 250ps ? low input and output leakage 1a (max.) ? esd > 2000v per mil-std-883, method 3015; > 200v using machine model (c = 200pf, r = 0) ? high drive outputs (?32ma i oh , 64ma i ol ) ? power off disable outputs permit ?live insertion? ? typical v olp (output ground bounce) < 1.0v at v cc = 5v, t a = 25c ? available in the following packages: ? industrial: ssop, tssop, tvsop ? military: cerpack
2 military and industrial temperature ranges idt54/74fct16245t/at/ct/et fast cmos 16-bit bidirectional transceiver ssop/ tssop/ tvsop/ cerpack top view pin configuration 1 dir 1 b 1 gnd 1 b 3 v cc gnd 2 b 2 gnd v cc gnd 1 b 2 1 b 4 1 b 5 1 b 6 1 b 7 1 b 8 2 b 1 2 b 3 2 b 4 2 b 5 2 b 7 2 b 8 2 b 6 2 dir 1 a 1 1 a 2 gnd 1 a 3 1 a 4 v cc 1 a 5 1 a 6 1 a 7 1 a 8 2 a 1 2 a 2 2 a 3 2 a 4 v cc 2 a 5 2 a 7 2 a 8 2 a 6 gnd gnd gnd 2 oe 1 oe 39 29 30 31 32 33 34 35 36 37 38 25 26 27 28 48 47 41 42 43 44 45 46 40 1 2 3 4 5 6 7 8 9 10 12 13 14 15 16 17 18 19 20 11 21 22 23 24 symbol description max unit v term (2) terminal voltage with respect to gnd ?0.5 to +7 v v term (3) terminal voltage with respect to gnd ?0.5 to v cc +0.5 v t stg storage temperature ?65 to +150 c i out dc output current ?60 to +120 ma absolute maximum ratings (1) (1) (1) (1) (1) notes: 1. stresses greater than those listed under absolute maximum ratings may cause permanent damage to the device. this is a stress rating only and functional operation of the device at these or any other conditions above those indicated in the operational sections of this specification is not implied. exposure to absolute maximum rating conditions for extended periods may affect reliability. 2. all device terminals except fct162xxxt and fct166xxxt (aport) output and i/o terminals. 3. output and i/o terminals terminals for fct162xxx and fct166xxxt (a-port). symbol parameter (1) conditions typ. max. unit c in input capacitance v in = 0v 3.5 6 pf c out output capacitance v out = 0v 3.5 8 pf capacitance (t a = +25c, f = 1.0mhz) note: 1. this parameter is measured at characterization but not tested. pin names description x oe output enable inputs (active low) xdir direction control inputs x a x side a inputs or 3-state outputs x b x side b inputs or 3-state outputs pin description note: 1. h = high voltage level l = low voltage level x = don?t care z = high-impedance inputs x oe xdir outputs l l bus b data to bus a l h bus a data to bus b h x high z state function table (1)
3 idt54/74fct16245t/at/ct/et fast cmos 16-bit bidirectional transceiver military and industrial temperature ranges symbol parameter test conditions (1) min. typ. (2) max. unit v ih input high level gu aranteed logic high level 2 ? ? v v il input low level guaranteed logic low level ? ? 0.8 v i ih input high current (input pins) (5) v cc = max. v i = v cc ?? 1a input high current (i/o pins) (5) ?? 1 i il input low current (input pins) (5) v i = gnd ? ? 1 input low current (i/o pins) (5) ?? 1 i ozh high impedance output current v cc = max. v o = 2.7v ? ? 1a i ozl (3-state output pins) (5) v o = 0.5v ? ? 1 v ik clamp diode voltage v cc = min., i in = ?18ma ? ?0.7 ?1.2 v i os short circuit current v cc = max., v o = gnd (3) ?80 ?140 ?250 ma v h input hysteresis ? ? 100 ? mv i ccl quiescent power supply current v cc = max. ? 5 500 a i cch v in = gnd or v cc i ccz dc electrical characteristics over operating range following conditions apply unless otherwise specified: industrial: t a = ?40c to +85c, v cc = 5.0v 10%; military: t a = ?55c to +125c, v cc = 5.0v 10% output drive characteristics notes: 1. for conditions shown as min. or max., use appropriate value specified under electrical characteristics for the applicable dev ice type. 2. typical values are at v cc = 5.0v, +25c ambient. 3. not more than one output should be shorted at one time. duration of the test should not exceed one second. 4. duration of the condition can not exceed one second. 5. the test limit for this parameter is 5a at t a = ?55c. symbol parameter test conditions (1) min. typ. (2) max. unit i o output drive current v cc = max., v o = 2.5v (3) ?50 ? ?180 ma v oh output high voltage v cc = min. i oh = ?3ma, ?2.5 3.5 ? v v in = v ih or v il i oh = ?12ma mil 2.4 3.5 ? v i oh = ?15ma ind i oh = ?24ma mil 2 3 ? v i oh = ?32ma ind (4) v ol output low voltage v cc = min. i ol = 48ma mil ? 0.2 0.55 v v in = v ih or v il i ol = 64ma ind i off input/output power off leakage (5) v cc = 0v , v in or v o 4.5v ? ? 1 a
4 military and industrial temperature ranges idt54/74fct16245t/at/ct/et fast cmos 16-bit bidirectional transceiver symbol parameter test conditions (1) min. typ. (2) max. unit ? i cc quiescent power supply current v cc = max. ? 0.5 1.5 ma ttl inputs high v in = 3.4v (3) i ccd dynamic power supply v cc = max. v in = v cc ? 60 100 a/ current (4) outputs open v in = gnd mhz x oe = xdir = gnd one input togging 50% duty cycle i c total power supply current (6) v cc = max. v in = v cc ? 0.6 1.5 ma outputs open v in = gnd f i = 10mhz 50% duty cycle v in = 3.4v ? 0.9 2.3 x oe = xdir = gnd v in = gnd one bit toggling v cc = max. v in = v cc ? 2.4 4.5 (5) outputs open v in = gnd f i = 2.5mhz 50% duty cycle x oe = xdir = gnd v in = 3.4v ? 6.4 16.5 (5) sixteen bitstogging v in = gnd power supply characteristics notes: 1. for conditions shown as min. or max., use appropriate value specified under electrical characteristics for the applicable dev ice type. 2. typical values are at v cc = 5.0v, +25c ambient. 3. per ttl driven input (v in = 3.4v). all other inputs at v cc or gnd. 4. this parameter is not directly testable, but is derived for use in total power supply calculations. 5. values for these conditions are examples of the i cc formula. these limits are guaranteed but not tested. 6. i c = i quiescent + i inputs + i dynamic i c = i cc + ? i cc d h n t + i ccd (f cp n cp /2 + fini) i cc = quiescent current (i ccl , i cch and i ccz ) ? i cc = power supply current for a ttl high input (v in = 3.4v) d h = duty cycle for ttl inputs high n t = number of ttl inputs at d h i ccd = dynamic current caused by an input transition pair (hlh or lhl) f cp = clock frequency for register devices (zero for non-register devices) n cp = number of clock inputs at f cp fi = input frequency ni = number of inputs at fi
5 idt54/74fct16245t/at/ct/et fast cmos 16-bit bidirectional transceiver military and industrial temperature ranges switching characteristics over operating range - industrial notes: 1. see test circuit and waveforms. 2. minimum limits are guaranteed but not tested on propagation delays. 3. skew between any two outputs of the same package switching in the same direction. this parameter is guaranteed by design. 4. this limit is guaranteed but not tested. 74fct16245at 74fct16245ct 74fct16245et symbol parameter condition (1) min. (2) max. min. (2) max. min. (2) max. unit t plh propagation delay c l = 50pf 1.5 4.6 1.5 4.1 1.5 3.2 ns t phl a to b, b to a r l = 500 ? t pzh output enable time 1.5 6.2 1.5 5.8 1.5 4.4 ns t pzl x oe to a or b t phz output disable time 1.5 5 1.5 4.8 1.5 4 ns t plz x oe to a or b t pzh output enable time 1.5 6.2 1.5 5.8 1.5 4.8 ns t pzl xdir to a or b (4) t phz output disable time 1.5 5 1.5 4.8 1.5 4 ns t pzl xdir to a or b (4) t sk(o) output skew (3) ? 0.5 ? 0.5 ? 0.5 ns 54fct16245t 54fct16245at 54fct16245ct symbol parameter condition (1) min. (2) max. min. (2) max. min. (2) max. unit t plh propagation delay c l = 50pf 1.5 7.5 1.5 4.9 1.5 4.5 ns t phl a to b, b to a r l = 500 ? t pzh output enable time 1.5 10 1.5 6.5 1.5 6.2 ns t pzl x oe to a or b t phz output disable time 1.5 10 1.5 6 1.5 5.2 ns t plz x oe to a or b t pzh output enable time 1.5 10 1.5 6.5 1.5 6.2 ns t pzl xdir to a or b (4) t phz output disable time 1.5 10 1.5 6 1.5 5.2 ns t pzl xdir to a or b (4) t sk(o) output skew (3) ? 0.5 ? 0.5 ? 0.5 ns switching characteristics over operating range - military
6 military and industrial temperature ranges idt54/74fct16245t/at/ct/et fast cmos 16-bit bidirectional transceiver pulse generator r t d.u.t. v cc v in c l v out 50pf 500 ? 500 ? 7.0v 3v 1.5v 0v 3v 1.5v 0v 3v 1.5v 0v 3v 1.5v 0v data input timing input asynchronous control preset clear etc. synchronous control t su t h t rem t su t h preset clear clock enable etc. high-low-high pulse low-high-low pulse t w 1.5v 1.5v same phase input transition 3v 1.5v 0v 1.5v v oh t plh output opposite phase input transition 3v 1.5v 0v t plh t phl t phl v ol control input 3v 1.5v 0v 3.5v 0v output normally low output normally high switch closed switch open v ol 0.3v 0.3v t plz t pzl t pzh t phz 3.5v 0v 1.5v 1.5v enable disable v oh test circuits and waveforms propagation delay test circuits for all outputs enable and disable times set-up, hold, and release times pulse width test switch open drain disable low closed enable low all other tests open switch position definitions: c l = load capacitance: includes jig and probe capacitance. r t = termination resistance: should be equal to z out of the pulse generator. notes: 1. diagram shown for input control enable-low and input control disable-high. 2. pulse generator for all pulses: rate 1.0mhz; t f 2.5ns; t r 2.5ns.
7 idt54/74fct16245t/at/ct/et fast cmos 16-bit bidirectional transceiver military and industrial temperature ranges ordering information idt xx temp. range xxxx device type xx package x process pv pa pf industrial options shrink small outline package thin shrink small outline package thin very small outline package 16-bit bidirectional transceiver 54 74 ? 55 c to +125 c ? 40 c to +85 c 16 double-density, 5 volt, balanced drive e military options cerpack blank b industrial mil-std-883, class b fct xxx family 245t 245at 245ct 245et corporate headquarters for sales: for tech support: 2975 stender way 800-345-7015 or 408-727-6116 logichelp@idt.com santa clara, ca 95054 fax: 408-492-8674 (408) 654-6459 www.idt.com 3/26/2002 removed standard speed grade 6/26/2002 updated as per pdns logic-00-07 and logic-01-04 6/5/2003 removed blank industrial speed grade as per pdns logic-00-07 and logic-01-04 data sheet document history
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